As a wafer inspection apparatus, for example, there is known a probe apparatus or a burn-in inspection apparatus that inspects electrical characteristics of multiple semiconductor devices formed on a wafer.
FIG. 11 is a cross sectional view illustrating a schematic configuration of a conventional probe apparatus.
As depicted in FIG. 11, a probe apparatus 100 includes a loader chamber 101 that forms a transfer section in which a wafer W is transferred; and an inspection chamber 102 that performs therein an electrical characteristic inspection of a multiple number of semiconductor devices formed on the wafer W. This probe apparatus 100 inspects electrical characteristics of the semiconductor devices by controlling various components within the loader chamber 101 and the inspection chamber 102 under the control of a controller. The inspection chamber 102 includes a mounting table 106 allowed to be moved in X, Y, Z and θ directions while mounting thereon the wafer W loaded from the loader chamber 101 by a transfer arm 103; a pogo frame 109 provided above the mounting table 106; a probe card 108 held by the pogo frame 109; and an alignment device 110 that adjusts relative positions between a multiple number of probes (inspection needles) provided on the probe card 108 and electrodes of a multiple number of semiconductor devices formed on the wafer W in cooperation with the mounting table 106. After the relative position between the wafer W and the probe card 108 is adjusted by the alignment device 110 and the mounting table 106, the individual probes of the probe card 108 are allowed to come into contact with the corresponding electrodes of the wafer W, and the electrical characteristics of the multiple number of the semiconductor devices formed on the wafer W are inspected (see, for example, Patent Document 1).
Patent Document 1: Japanese Patent Laid-open Publication No. 2004-140241